HARDWARE IMPLEMENTATION OF AN ENCRYPTION FOR ENHANCEMENT DGHV

Abstract

A fully homomorphic encryption (FHE) scheme is considered as a major cryptographic tool in a secureand reliable cloud computing environment, as it enables arbitrary arithmetic processing of a ciphertext withoutrevealing the plaintext. However, due to the very high computation of fully homomorphic encryption system, it staysimpractical and unfit for real- time applications. One way to address this restriction is by using graphics processingunits (GPUs) and field programmable gate arrays (FPGAs) to implement homomorphic encryption schemes. Thispaper presents the hardware implementation of enhancement van Dijk, Gentry, Halevi and Vaikuntanathan’s(DGHV 10) scheme over the integer using FPGA technology for high speed computation and real time results.The proposed method was simulated via Vivado system generator tools and implemented in FPGA hardwaresuccessfully using NEXYS 4 DDR board with ARTIX 7 XC7A100T . The experimental results show that the FPGAbasedfully homomorphic encryption system is 63 times faster than the simulated version of the proposed algorithm.