DIFFERENT FPGA PRODUCTS BASED IMPLEMENTATION OF LTE TURBO CODE

Abstract

In the long- term evolution(LTE) physical layer, using turbo code is considered the core of the errorcorrectingcode. This paper presents an implementation of LTE turbo decoding using the Log- Maximum aposteriori (MAP) algorithm with reduced number of required cycles approximately by 75% based on serial toparallel operation. Additionally, an improvement for this algorithm based on polynomial regression function isdone to reduce the implementation complexity. These system implementations, are designed with 40 bit block sizeof the input using Xilinx System Generator (XSG) to show its applicability in real time using two approaches;Hardware Co-Simulation and HDL Netlist based on three devices, Xilinx Kintex- 7, Spartan- 6 and Artix- 7.From the hardware implementation observation, the system becomes completely real time by the user control usingthe switches on the board. Also, this system has taken the resources utilization from the devices less than other works.