VHDL Processor for Covering Information Using MD5 Algorithm I

Abstract

The data protection means a life protection, since the life has become some kind of data transfer. In the data transformation, there are two factors that must be satisfied; distortion and security at any joint or destination point. The work of this paper will focus on the security factor. The efficiency of the MD5 algorithm urged us to use it to cover the information which needs to be secure. MD5 represents one way security algorithm with covering algorithms that are popular ways for hidden the data. In this paper we use MD5 with many covering algorithms in four scenarios which proposed to increase the degree of security. The scenarios operation shows efficient results for our goal. Therefore, two power points can gain from this combination (MD5 and proposed cover algorithms), which are the length of the stream before it has been repeating and its complexity. The stream length for the proposed algorithms with respect to the MD5 will be increased form 256 for 8-bit in MD5 to 16384 for scenarios B and C and 49152 for scenario D with 20 nsec and 60 n sec respectively. The covering and recovering circuits have been implemented using Xilinx Spartan 3-xc3s1400a-4fg484. Key words: VHDL, FPGA-Spartan-3, Code-Cover, and MD5.