Abstract
This paper is an attempt to design and implement MAC (multiply-accumulate) units for pipeline DSP architectures on FPGAs. An application has been chosen to evaluate the results of the architecture. Results show that these units are applicable and can be used by the developers especially by the lifting based discrete wavelet transform.Keywords: MAC unit, FPGAs, Architecture.
The article was added to IASJ on 2012-06-13
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