Abstract

Design of a Fuzzy Logic Controller (FLC) requires more design decisions thanusual, for example rule base, inference engine, defuzzifiction, and data pre- andpost processing.This paper describes a way to implement a simple (FLC) in VHDL, there arethree parts to fuzzy controller, the fuzzification of the inputs, the defuzzificationof the outputs, and the rule base. The controller that is implemented hasdemonstrated a 2-input, 1-output fuzzy controller with 5-membership functions.This paper identifies and describes the design choices related to simple fuzzy logiccontroller, based on an international standard which is underway.In this paper, we propose a VHDL-based logic synthesis approach for designingto reduce design time. A complete description of the controller (A fuzzier,defuzzifier parts and a rule based are written in VHDL by using Active_HDL andare assembled and synthesized using logic synthesis tools of ISE4.1 software. Theefficiency of the generated hardware is explored for FPGAs technology.

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The article was added to IASJ on 2012-05-04

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