A Second-Order Single Loop Oversampling Analog-to-Digital Converter (ADC) with Proposed Hybrid Feedforward/Feedback Architecture


This paper proposes hybrid architecture of feedforward/feedback second ordersingle-loop modulator for high resolution analog-to-digital converter (ADC)applications. Different techniques for oversampling modulator are discussed. Theproposed architecture consists of three stages. The first stage is 2nd order singleloop oversampling ADC with novel feedforward/feedback architecture. In thesecond stage, an error cancellation circuit (ECC) is proposed at the output of themodulator to noise shaping of quantization noise. In addition, the third stage is adecimation filter in order to reduce the oversampling ratio (OSR) which is suitablefor broadband applications. With low OSR=24, the signal-to-noise ratio (SNR) isimproved about 55 dB if compared with traditional architecture (feedback singleloophigh order topology). The achieved resolution or the effective number of bits(ENOB) is (22-bit). With high OSR=256, the net improvement in quantizationnoise reduction is 64 dB if compared with feedforward architecture (single-loophigh order) and the ENOB=28. Finally a 1-bit quantizer is used in the proposedarchitecture which greatly decreases the circuit implementation complexity andpower consumption. Simulation results show the superiority performance ofproposed hybrid architecture as compared with traditional modulator topologies(feedforward and feedback).