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Article
A Modified Back Propagation Algorithm for Assyrian Optical Character Recognition Based on Moments

Authors: Luma Fayeq Jalil --- Modhar Mohsen Mohammed
Journal: Engineering and Technology Journal مجلة الهندسة والتكنولوجيا ISSN: 16816900 24120758 Year: 2016 Volume: 34 Issue: 2 Part (B) Scientific Pages: 255-268
Publisher: University of Technology الجامعة التكنولوجية

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Abstract

Character recognition has been very popular and interested area for researches, and it continues to be a challenging and impressive research topic due to its diverse applicable environment. The optical character recognition has been introduced as a fast and accurate method to convert both existing text images as well as large archives of existing paper documents to editable digital text format.However, existing optical character recognition algorithms suffer from flawed tradeoffs between accuracy and speed, making them less effective and impractical for large and complex documents. This paper describes a suggested method for Assyrian optical character recognition using modified back propagation artificial neural network based on moments. The experimental results show that the proposed method achieves higher recognition accuracy rate in compared with the standard algorithm.


Article
Text Hiding in 3D Object

Authors: Luma Fayeq Jalil --- Muna M. Laftah
Journal: Engineering and Technology Journal مجلة الهندسة والتكنولوجيا ISSN: 16816900 24120758 Year: 2016 Volume: 34 Issue: 5 Part (B) Scientific Pages: 683-690
Publisher: University of Technology الجامعة التكنولوجية

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Abstract

In this research was to propose a new way to hide data from the text in the tri-dimensional images type depending on the geometric style is proposed, this can be done via the manipulation of the location of the (vertex) in most areas of softness in the triangular object dimensions of any of the many details areas so we make sure not to detect the presence of the data eye human. The experimental results showed, a high rate of failure note the presence of hidden data depending on the scale "RMS" Tripartite-dimensional images, and the way showed good resistance to the types of geometric attack such as "translation"," rotation" and "scaling" and out where he was retrieving a full hidden data without any destruction and this is what boosted "BER".


Article
Proposal New Cache Coherence Protocol to Optimize CPU Time through Simulation Caches

Authors: Luma Fayeq Jalil --- Maha Abdulkareem .H. Al-Rawi --- Abeer Diaa Al-Nakshabandi
Journal: Engineering and Technology Journal مجلة الهندسة والتكنولوجيا ISSN: 16816900 24120758 Year: 2016 Volume: 34 Issue: 6 Part (B) Scientific Pages: 912-924
Publisher: University of Technology الجامعة التكنولوجية

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Abstract

The cache coherence is the most important issue that rapidly affected the performance of a multicore processor as a result of increasing the number of cores on chip multiprocessors and the shared memory program that will be run on these processors. "Snoopy protocols" and "directory based protocols" are two types of protocols that are used to achieve coherence between caches. The main objective of these Protocols is to achieve consistency and validation of the data value in the caches of a multi core processor so that any reading of a memory address via any caches will returns the latest data written to that address.In this paper, a new protocol has been designed to solve a problem of a cache coherence that combines the two schemes of coherency: snooping and directory depending on the states of MESI protocol. The MESI protocol is a version of the snooping cache protocol which based on four (Modified, Exclusive, Shared, Invalid) states that a block in the cache memory can have. The proposed protocol has the same states of MESI protocol but the difference is in laying the directory inside a shared cache instead of main memory to make the processor more efficient by reducing the gap between fast CPU and slow main memory.


Article
Cache Coherence Protocol Design and Simulation Using IES (Invalid Exclusive read/write Shared) State
تصميم ومحاكاة بروتوكول الترابط في الذاكرةالمخبئية باستخدام حالات (غير صالح، حصري في القراءة والكتابة، مشترك)

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Abstract

To improve the efficiency of a processor in recent multiprocessor systems to deal with data, cache memories are used to access data instead of main memory which reduces the latency of delay time. In such systems, when installing different caches in different processors in shared memory architecture, the difficulties appear when there is a need to maintain consistency between the cache memories of different processors. So, cache coherency protocol is very important in such kinds of system. MSI, MESI, MOSI, MOESI, etc. are the famous protocols to solve cache coherency problem.We have proposed in this research integrating two states of MESI's cache coherence protocol which are Exclusive and Modified, which responds to a request from reading and writing at the same time and that are exclusive to these requests. Also back to the main memory from one of the other processor that has a modified state is removed in using a proposed protocol when it is invalidated as a result of writing to that location that has the same address because in all cases it depends on the latest value written and if back to memory is used to protect data from loss; preprocessing steps to IES protocol is used to maintain and saving data in main memory when it evict from the cache. All of this leads to increased processor efficiency by reducing access to main memory.

في الانظمة الحديثة للمعالجات المتعددة تم استخدام الذواكر المخبئية بدلا من الذاكرة الرئيسة في حالة الوصول الى البيانات وذلك لتحسين كفاءة المعالج من خلال تقليل تأخيرالوصول الى البيانات. الا ان الصعوبة في هذه الانظمة والتي يتم فيها تنصيب مختلف الذواكر المخبئية في عدة معالجات التي تشترك بذاكرة واحدة تكمن في الحفاظ على التطابق بين ذاكرات الذواكر المخبئية ذات المعالجات المتعددة. ولهذا السبب من الضروري استخدام بروتوكول الترابط مابين الذواكر المخبيئة. ومن انواع البروتوكولات المشهورة لحل المشكلة التي تظهر عند الترابط مابين الذواكر المخبئية هي MOESI, MOSI, MESI, MSI. لقد اقترحنا في هذا البحث دمج حالتين من حالات بروتوكول ترابط الذواكر المخبئية ميسي والتي هي الحصرية والمعدلة والتي تستجيب لطلبات القراءة والكتابة في نفس الوقت والتي تعود حصرا لهذه الطلبات. وأيضا تم ازالة الرجوع الى الذاكرة الرئيسية باستخدام البروتوكول المقترح من احدى المعالجات التي تكون في حالة "معدلة" والتي تصبح في حالة "غير صالح" عند الكتابة من معالج اخر له نفس العنوان لانه في كل الاحوال يتم الاعتماد على القيمة الاخيرة التي يتم كتابتها واذا كان الرجوع الى الذاكرة يستخدم للحفاظ على البيانات من الضياع فانه باستخدام الخطوات المسبقة للبروتوكول المقترح يتم الاحتفاظ وخزن البيانات في الذاكرة الرئيسية عند خروجها من الذاكرة المخبئية. كل هذا يؤدي إلى زيادة كفاءة المعالج عن طريق الحد من الوصول إلى الذاكرة.

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